LusSy: an open Tool for the Analysis of Systems-on-aChip at the Transaction Level Matthieu Moy∗ , Florence Maraninchi* , Laurent Maillet-Contoz† Abstract. We describe a toolbox for the analysis of Systems-on-a-chip w

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Date: 2007-12-17 11:12:12 Electronic design automation SystemC Logic design Transaction-level modeling High-level synthesis VHDL Advanced Learning and Research Institute Verilog Catapult C Electronic engineering Hardware description languages Digital electronics		LusSy: an open Tool for the Analysis of Systems-on-aChip at the Transaction Level Matthieu Moy∗ , Florence Maraninchi* , Laurent Maillet-Contoz† Abstract. We describe a toolbox for the analysis of Systems-on-a-chip w Add to Reading List Source URL: www-verimag.imag.fr Download Document from Source Website File Size: 416,69 KB Share Document on Facebook

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