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Software pipelining / CPU cache / Cache / Parallel computing / Instruction-level parallelism / Computer engineering / Computer hardware / Computer memory / Computing


Comparing and Combining Read Miss Clustering and Software Prefetching  
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Document Date: 2002-03-20 08:48:08

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File Size: 162,83 KB

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Company

Intel Corporation / IBM Partnership / /

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Facility

Computer Engineering Rice University / Computer Science University of Illinois Urbana-Champaign / /

IndustryTerm

implemented software prefetching algorithm / compile-time algorithm / software pipelining / implemented software prefetching algorithms / regular and irregular applications / out-of-order processors / out-of-order processor / software prefetching / software prefetching algorithm / /

Organization

National Science Foundation / Computer Engineering Rice University Houston / Computer Science University of Illinois Urbana-Champaign / /

Person

Sarita V. Adve / Sarita V / Vijay S. Pai / /

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Position

head / /

ProvinceOrState

Illinois / /

Technology

out-of-order processors / loop-based algorithm / simulation / implemented software prefetching algorithms / 2.1 Algorithm / out-of-order processor / compile-time algorithm / software prefetching algorithm / implemented software prefetching algorithm / /

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