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Computer hardware / Computer memory / Software pipelining / AMD 10h / Loop unwinding / CPU cache / Branch predication / Explicitly parallel instruction computing / Compiler optimizations / Computing / Computer architecture


Optimizing Software Data Prefetches with Rotating Registers Gautam Doshi Intel Corporation 2200, Mission College Blvd Santa Clara, CA 95052
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Document Date: 2002-03-20 08:48:06

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File Size: 80,68 KB

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Santa Clara / /

Company

CEXIT LC / Rotating Registers Gautam Doshi Intel Corporation / Intel / Rakesh Krishnaiyer Intel Corporation / Kalyan Muthukumar Intel Technology India Pvt Ltd / /

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pence / /

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IndustryTerm

software-pipelined loop branch / software pipelining / software-pipelined loop branch instructions / software-pipelined counted loop branch / software-pipelined branches / Software-pipelined loop branches / software pipeline / software data prefetching / software-prefetching method / software data prefetches / software prefetching / software prefetching techniques / software renaming / /

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Position

General / /

Product

Koss P15 Headphone/Headset / /

ProgrammingLanguage

EC / C / /

ProvinceOrState

California / Ontario / /

Technology

ItaniumTM processor / Cmp / /

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