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Computing / 64b/66b encoding / 10 Gigabit Ethernet / Physical Coding Sublayer / XSBI / Media Independent Interface / XAUI / Physical Medium Dependent / Low-voltage differential signaling / Ethernet / OSI protocols / Electronic engineering


Document Date: 2013-03-04 06:09:09

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City

PMD / /

Company

Xilinx Inc. / Internal-Input INC / /

Organization

ML10G Board / /

Person

Justin Gaither / RAM BUFGMUX DCM PCS SDR / Marc Cimadevilla / RAM TXPCLKN / /

Position

Test Controller / Core_clk xgmii_controller / Gigabit Ethernet Media Access Controller / /

Product

RocketPHY 10 Gigabit Transceiver / ChipScope modules / RAM / ChipScope / /

ProgrammingLanguage

R / Verilog / /

ProvinceOrState

Texas / /

TVStation

WIS / /

Technology

FPGA / LAN / RAM / Gigabit / simulation / Verilog / Ethernet protocol / WAN / vhdl / Gigabit Ethernet / /

URL

http /

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