SHA-3 on ARM11 processors Peter Schwabe1 , Bo-Yin Yang1 , and Shang-Yi Yang2 1 ?

First Page		Document Content
Date: 2013-02-27 00:13:54 Computer architecture Cryptography Computing NIST hash function competition Instruction set architectures Cryptographic hash functions Assembly languages Grstl ARM architecture SHA-2 64-bit computing Addressing mode		SHA-3 on ARM11 processors Peter Schwabe1 , Bo-Yin Yang1 , and Shang-Yi Yang2 1 ? Add to Reading List Source URL: precision.moscito.org Download Document from Source Website File Size: 327,55 KB Share Document on Facebook

	On the design and cryptanalysis of a one-way hash Carl Ellison Victor Miller Eran Tromer Rebecca Wright In this paper we describe a novel one-way hash function that is compliant with the NIST hash function competition dr DocID: 1t9VA - View Document
	Keccak sponge function family main document Guido Bertoni1 Joan Daemen1 Micha¨el Peeters2 DocID: 1qZv0 - View Document
	Microsoft PowerPoint - AWACS-PQC DocID: 1qio2 - View Document
	Parallel vs. Sequential Computations Do they Leak the Same? Advisor(s): Thomas Korak and Hannes Groß Institute for Applied Information Processing and Communications (IAIK) Graz University of Technology, Austria DocID: 1q4rG - View Document