First Page | Document Content | |
---|---|---|
Date: 2015-01-10 06:34:49Integrated circuits Automatic test pattern generation Linear-feedback shift register Built-in self-test Scan chain Hardware Trojan | Low Power MSIC Signatures for Effective BIST Design Chekka Narasimha Rao M.Tech Student, Audi Sankara Institute of Technology, NH-5 Bypass Road, East Gudur Rural, AndrapradeshAdd to Reading ListSource URL: www.ijmetmr.comDownload Document from Source WebsiteFile Size: 581,93 KBShare Document on Facebook |