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Computer arithmetic / Mathematical notation / Algebraic structures / Mathematical structures / Multiplication / Montgomery reduction / Multiplication algorithm / Euclidean algorithm / XTR / Mathematics / Abstract algebra / Arithmetic


New Speed Records for Montgomery Modular Multiplication on 8-bit AVR Microcontrollers Zhe Liu and Johann Großsch¨adl University of Luxembourg, Laboratory of Algorithmics, Cryptology and Security (LACS), 6, rue Richard
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Document Date: 2014-04-20 19:34:09


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Facility

Johann Großsch¨adl University of Luxembourg / National Institute of Standards and Technology / Laboratory of Algorithmics / TinyECC library / /

IndustryTerm

target processor / basic software techniques / wireless sensor nodes / 2n-bit product / cryptographic applications / software implementation / software implementations / double-precision product / multiplication algorithms / /

Organization

National Institute of Standards and Technology / Laboratory of Algorithmics / Cryptology and Security / CIHS FIOS / AVR Microcontrollers Zhe Liu and Johann Großsch¨adl University of Luxembourg / /

Person

Peter Montgomery / Johann Großsch / Microcontrollers Zhe Liu / /

ProgrammingLanguage

C / /

Technology

J. Großsch¨ adl Algorithm / identity-based encryption / target processor / cryptography / RAM / 8-bit AVR processors / adc / 9 Algorithm / 8-bit processors / hybrid Montgomery multiplication algorithms / AVR processors / RISC processor / Euclidean algorithm / /

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