Prentice-Hall / VDDS / Cox / VF / Channel M / Low Power Electronics / Texas Instruments / /
Country
United States / /
Currency
USD / / /
Facility
TX Massachusetts Institute of Technology Cambridge / Massachusetts Institute of Technology / pipeline ADCs / /
IndustryTerm
predicted energy / expanded clock network / energy optimization / analog energy / 3× lower energy / overall energy savings / energy-performance optimization / 3× energy savings / mixedsignal systems / energy breakdown / digital energy / optimum energy point / mixed-signal energy savings / comparator energy / digital processing / digital energy saving methods / exhaustive search / similar network / energy savings / energy / minimum modeled energy / energy consumption / Parallel energy / energy model block / possible solution / energy scales / sized sampling network / clock energy / energy efficiency / energy models / significant energy savings / energy model / proposed energy model / /
Organization
Institute of Technology Cambridge / Massachusetts Institute of Technology / US Federal Reserve / /
Person
Brian P. Ginsburg Anantha / /
Position
model for comprehensive analog/digital optimization / Aids General / digital logic controller / /