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City New Jersy / Boston / / Company MIT Laboratory / Cisco / Intel / / Country United States / / Currency USD / / / Facility duplex DRAM / duplex SDRAMs / / IndustryTerm switch processor / dedicated switch-processors / click modular router / cache miss protocol / structured low-latency on-chip networks / dynamic networks / software router / streaming on-chip networks / software-based router using network processors / header processing functions / header-processing pipeline / header processing tasks / update algorithm / low-latency on-chip networks / packet header processing steps / Internet traffic / real Internet traffic trace / packet-processing pipelines / actual hardware / static network routers / header processing / software-level control / low-latency on-chip interconnection networks / software-based routers / static network / packet processing pipelines / static-network / memory dynamic network / low-latency on-chip / static networks / extensible software router / software-based router architectures / software implements / memory network / Internet packet streams / active queue management / parallel processing / packet-processing pipeline / on-chip networks / header processing operations / multiprocessor pc router / parallel processing paths / static router / stage dynamic network / level network services / post-processing scripts / software implementation / on-chip low-latency networks / packet processing / software routers / dynamic network / statically-routed streaming networks / software-based high-performance network / captured Internet Traffic Trace linecards / programmable router / parallel processors / captured Internet trace files / on-chip / routed networks / / Movie In the RAW / / Organization Laboratory for Computer Science / MIT / / Person Yitzchak Gottlieb / Jean-Loup Baer / Larry L. Peterson / Gleb A. Chuvpilo / John Jannotti / Steven Lin / Michael Bedford Taylor / Scott Karlin / Saman Amarasinghe / Tammo Spalink / Isaac Keslassy / M. Frans Kaashoek / Marc E. Fluczynski / Patrick Crowley / Robert Morris / Benjie Chen / Nick McKeown / Pankaj Gupta / Nick McKeown Shang-Tse / Eddie Kohler / Umar Saif James / Anthony Degangi Anant Agarwal / James W. Anderson Anthony Degangi Anant / / Position Routers General / General / memory controller / / Product IXP1200 / IXP1200 Network Processor / Intel IXP1200 Network Processor / / ProvinceOrState Massachusetts / / RadioStation RAW 4 / / Technology RAM / Click router / DMA protocol / 4 processor / multiprocessor pc router / RAW router / basic IPv4 network router / shared memory / CMP / low-latency on-chip / update algorithm / 4 processors / 8 processor / RAW chip / previous software routers / result Router / RAW processor / example router / static network routers / static router / software-based router using network processors / full-duplex / RAW IP router / network processors / parallel processors / RAW on-chip / RAW DMA protocol / MTU / RAW cache miss protocol / UDP / Operating Systems / half-duplex / software-based routers / Ethernet / software router / extensible software router / Packet Switching / artificial intelligence / network routers / ing network processors / dedicated switch-processors / caching / IPv4 / SDRAM / Gigabit / software routers / structured low-latency on-chip / network router / Performance Keywords RAW router / parallel processing / switch processor / using the RAW cache miss protocol / / URL http / SocialTag 
Gigabit Routing on a Software-exposed Tiled-microprocessor Umar Saif James W. Anderson Anthony Degangi Anant Agarwal