manufacturing limit / metal / lower metal layers / off-chip / clock network / metal grid / Post-schematic tools / power management / hot carrier effects / logic synthesis tool / metal-oxide semiconductor / microprocessor chip / verification tools / metal orientations / device-sizing tool / upper metal layers / synthesis tools / cache coherence protocol / metal layers / on-chip / /
Person
Robert O. Mueller / William J. Bowhill / Sharon M. Britton / Bradley J. Benschneider / Harry R. Fair / III / Anil K. Jain / Michael J. Smith / Timothy A. Shedd / John H. Edmondson / Marc E. Lamere / Patricia L. Kroesen / Andrew J. Black / Shane L. Bell / Bruce J. Loughlin / Dale R. Donchin / Stephen C. Thierauf / Ruben W. Castelino / Paul E. Gronowski / /
Position
shifter operand bus driver / driver / PRE_CLK driver / extracted clock driver / final clock driver / schematic editor / shifter driver / operand bus driver / /
Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU by William J. Bowhill, Shane L. Bell, Bradley J. Benschneider, Andrew J. Black, Sharon M. Britton, Ruben W. Castelino, Dale R. Donchin, John H.