Back to Results
First PageMeta Content
Electronics / Electromagnetism / Integrated circuits / Electronic design / CMOS / Low-power electronics / Adiabatic circuit / Dynamic logic / Logic gate / Electronic engineering / Logic families / Digital electronics


PROCEEDINGS OF ICETECT[removed]Adiabatic Technique for Energy Efficient Logic Circuits Design Rakesh Kumar Yadav#1, Ashwani K. Rana#2, Shweta Chauhan#3, Deepesh Ranka#4, Kamalesh Yadav#5 #
Add to Reading List

Document Date: 2014-04-28 10:11:01

Open Document

File Size: 1,14 MB

Share Result on Facebook

City

San Diego / /

Company

IEEE Press / COX / Hamirpur Hamirpur / Low Power Electronics / VLSI Systems / Technical Digest IEEE Symposium Low Power Electronics / /

Country

Switzerland / India / /

Currency

pence / USD / /

/

Facility

National Institute of Technology / Chapel Hill Conf / /

IndustryTerm

2RC then energy dissipation / output energy / adiabatic computing / energy shavings / stored energy / energy consumption / energy dissipation / less energy consumption / less energy dissipation / energy computing / dissipation energy / recovered energy logic / energy dissipation increases / lowpower digital systems / energy loss / energy exchange / dissipated energy loss / large energy savings / computing / 250nm technology node / drawn energy / energy savings / energy / /

MarketIndex

VDD / /

Organization

Department of Electronics and Communication / Institute of Technology / ECRL PFAL / /

Person

Ashwani K. Rana / Rakesh Kumar Yadav / /

Position

CMOS line driver / /

SocialTag