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Verilog / Reduced instruction set computing / University of California / Berkeley / Synopsys / University of California / Davis / University of California / VLSI Technology / Association of Public and Land-Grant Universities / California / Electronic engineering


BEN KELLER EDUCATION University of California, Berkeley, PhD, Electrical Engineering, Expected June 2017, GPA: 3.94 American University, Master of Arts in Teaching, Secondary Mathematics, June 2012, GPA: 4.0 Harvey Mudd
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Document Date: 2013-12-18 19:46:11

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City

Washington / DC / /

Company

RTL / Synopsys / /

Continent

America / /

Facility

BEN KELLER EDUCATION University of California / American University / Harvey Mudd College / /

IndustryTerm

model energy / system-level energy model / minimum-energy operation / reduced energy consumption / memory scheduling algorithms / /

Organization

University of California / Berkeley / American University / Cesar Chavez High School for Public Policy / National Science Foundation / Berkeley Wireless Research Center / UC Berkeley / ASPIRE Lab / Harvey Mudd College / /

Person

BEN KELLER / /

Position

ACTIVITIES Outreach Coordinator / EEGSA Outreach Program / Present LPDDR2 Memory Controller / VLSI Systems Design Course / LPDDR2 memory controller / EECS Chair / Instructor / VLSI Systems Design / RISC-V compiler toolchain Math Teacher / Dean / /

ProgrammingLanguage

Perl / DC / Python / C++ / Verilog / Scala / /

ProvinceOrState

California / /

Technology

mobile processor / Perl / Verilog / memory scheduling algorithms / RISC-V processor / /

SocialTag