Benini

Results: 50



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11Address Bus Encoding Techniques for System-Level Power Optimization Luca Benini $ Giovanni De Micheli $  Enrico Macii 

Address Bus Encoding Techniques for System-Level Power Optimization Luca Benini $ Giovanni De Micheli $ Enrico Macii 

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Source URL: si2.epfl.ch

Language: English - Date: 2005-05-20 05:52:25
    12Designing Low-Power Circuits: Practical Recipes by Luca Benini * Giovanni De Micheli Enrico Macii

    Designing Low-Power Circuits: Practical Recipes by Luca Benini * Giovanni De Micheli Enrico Macii

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    Source URL: si2.epfl.ch

    Language: English - Date: 2005-05-20 05:53:03
      13Lookup Table Power Macro-models for Behavioral Library Components. M. Barocci L. Benini A. Bogliolo B. Ricco G. De Micheli t

      Lookup Table Power Macro-models for Behavioral Library Components. M. Barocci L. Benini A. Bogliolo B. Ricco G. De Micheli t

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      Source URL: si2.epfl.ch

      Language: English - Date: 2005-05-20 05:52:31
        14Dynamic Power Management for non-stationary service requests Eui-Young Chung  Luca Benini

        Dynamic Power Management for non-stationary service requests Eui-Young Chung Luca Benini

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        Language: English - Date: 2005-05-20 05:52:42
          15System-Level Power Optimization: Techniques and Tools LUCA BENINI Università di Bologna and GIOVANNI DE MICHELI

          System-Level Power Optimization: Techniques and Tools LUCA BENINI Università di Bologna and GIOVANNI DE MICHELI

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          Language: English - Date: 2005-05-20 05:52:57
            16Dynamic Power Management for Portable Systems Tajana Simunic Luca Benini* Peter Glynnt Giovanni De Micheli Computer Systems tManagement Science and *DEIS Laboratory

            Dynamic Power Management for Portable Systems Tajana Simunic Luca Benini* Peter Glynnt Giovanni De Micheli Computer Systems tManagement Science and *DEIS Laboratory

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            Source URL: si2.epfl.ch

            Language: English - Date: 2005-05-20 05:52:53
              17DecisionDiagrams and PassTransistor Logic Synthesis V. Bertacco S.Minato P.VerplaetseL. Benini G. De Micheli StanforoUniversity ComputerSystemsLaboratory Stanforo.CA 94305

              DecisionDiagrams and PassTransistor Logic Synthesis V. Bertacco S.Minato P.VerplaetseL. Benini G. De Micheli StanforoUniversity ComputerSystemsLaboratory Stanforo.CA 94305

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              Language: English - Date: 2005-05-20 05:50:53
                18Fixing Moduli in Exact Type IIA Flux Vacua Francesco Benini SISSA/ISAS Trieste, Italy  RTN Workshop, Napoli

                Fixing Moduli in Exact Type IIA Flux Vacua Francesco Benini SISSA/ISAS Trieste, Italy RTN Workshop, Napoli

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                Source URL: wsrtn06.na.infn.it

                Language: English - Date: 2006-10-11 02:08:22
                  19A Survey of Boolean Matching Techniques for Library Binding LUCA BENINI and GIOVANNI DE MICHELI Stanford University  When binding a logic network to a set of cells, a fundamental problem is recognizing whether

                  A Survey of Boolean Matching Techniques for Library Binding LUCA BENINI and GIOVANNI DE MICHELI Stanford University When binding a logic network to a set of cells, a fundamental problem is recognizing whether

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                  Source URL: si2.epfl.ch

                  Language: English - Date: 2005-05-20 05:52:16
                    20Quantitative Comparison of Power Management Algorithms ˇ Yung-Hsiang Lu, Eui-Young Chung, Tajana Simuni´ c, † Luca Benini, Giovanni De Micheli Computer Systems Laboratory, Stanford University, USA {luyung, eychung, t

                    Quantitative Comparison of Power Management Algorithms ˇ Yung-Hsiang Lu, Eui-Young Chung, Tajana Simuni´ c, † Luca Benini, Giovanni De Micheli Computer Systems Laboratory, Stanford University, USA {luyung, eychung, t

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                    Source URL: si2.epfl.ch

                    Language: English - Date: 2005-05-20 05:52:51