Back to Results
First PageMeta Content
Central processing unit / Branch predictor / Assembly languages / Hazard / Branch misprediction / CPU cache / Instruction set / Delay slot / Addressing mode / Computer architecture / Computer hardware / Computer engineering


PRE-COMPUTED BRANCH “PREDICTION” Lucian N. VINTAN*, Marius SBERA**, Adrian FLOREA* * “Lucian Blaga” University of Sibiu, Computer Science Department, Sibiu, ROMANIA E-mail: [removed], aflorea@vectr
Add to Reading List

Document Date: 2010-05-17 01:48:51

Open Document

File Size: 398,03 KB

Share Result on Facebook

City

Sibiu / /

Company

S.C. Consultens Informationstechnik S.R.L. / /

Country

United Kingdom / /

/

Facility

University of Sibiu / KBits complex / University of Hertfordshire / /

IndustryTerm

table search / /

Organization

PC PT / Romanian Ministry of Education / University of Sibiu / University of Hertfordshire / IF PT / IF PC / Computer Science Department / Stanford / /

Person

Gordon B. Steven / Colin Egan / /

Position

scheduler / Professor / Producer / designer / /

ProgrammingLanguage

RC / Perl / FALSE / /

PublishedMedium

on SPEC / /

Technology

Perl / Simulation / proposed PCB algorithm / /

SocialTag