| Document Date: 2014-10-28 21:41:11
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City Santa Clara / Fremont / San Diego / / Company BEEcube Inc. / Intel / / Currency AMD / / Event FDA Phase / / Facility Trevor Bunker / Sandy Bridge / University of California / / IndustryTerm leanest protocol / network interface protocols / 45nm generation phase change memory technology / given hardware / storage device / non-volatile storage technologies / readside protocol / device protocols / communication protocol / host systems / block device / memory technologies / memory cell technologies / technology demonstrators / peripheral storage device / energy cost / hard real time latency bounds / lithographed memory devices / x86 processor / block storage device / interface protocol / commodity hardware / particular storage device / write-side protocol / real time latency / / OperatingSystem Linux / Ubuntu / Fedora / / Organization USENIX Association / HGST San Jose Research Center / University of California / San Diego / / Person Cyril Guyot / Luiz Franca-Neto / Robert Mateescu / Dejan Vučinić / Filip Blagojević / Jian Xu / Steven Swanson / / / Position driver / linux block device driver / custom memory controller / lightweight block device driver / Linux NVMe device driver / block driver / memory controller / PCM controller / / Product LPDDR2-NVM / E5-2690 / / ProgrammingLanguage DC / / ProvinceOrState California / / PublishedMedium Physical Review Letters / the NVM Express / Applied Physics Letters / the DC Express / the PCI Express / / Technology 45nm generation phase change memory technology / FPGA / leanest protocol / full-duplex / memory technologies / Linux / DC Express protocols / network interface protocols / x86 processor / lithography / operating system / non-volatile storage technologies / Operating Systems / existing device protocols / resulting protocol / flow control / 0.368 protocol / DC Express protocol / NVMe-compliant interface protocol / communication protocol / write-side protocol / readside protocol / bare protocol / memory cell technologies / Shortest Latency Protocol / flash / PCM chip / simplified protocol / / URL http /
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DC Express: Shortest Latency Protocol for Reading Phase Change Memory over PCI Express Dejan Vučinić, Qingbo Wang, Cyril Guyot, Robert Mateescu, Filip Blagojević, Luiz Franca-Neto, and Damien Le Moal, HGST San Jose Re