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![]() | Document Date: 2001-05-18 16:44:10Open Document File Size: 198,10 KBShare Result on FacebookCityOrlando / Scalable Queue / Snowbird / Cancun / /CompanyIBM / Computer Sciences / Compaq / Mercury Computer Corp. / /CountryUnited States / Mexico / /CurrencyUSD / / /FacilityComputer Science University of Rochester Rochester / Swedish Institute of Computer Science / Building FIFO / University of Wisconsin / /IndustryTermrecent processors / spin lock algorithms / bank / active processors / synchronization algorithm / different processors / significant signal processing applications / fewer active processors / active processor / invalidation-based cachecoherence protocol / /OperatingSystemSequent / /OrganizationUniv. of Washington / National Science Foundation / Computer Science University of Rochester Rochester / University of Wisconsin / Swedish Institute of Computer Science / /PersonJohn Mellor / Michael L. Scott / Mark Hill / Vitaly Oratovsky / Socalled / William N. Scherer III / / /Positionscheduler / head / /ProgrammingLanguageE / C / /ProvinceOrStateWisconsin / Utah / Florida / /TechnologyAlpha / Ethernet / two active processors / 16 processors / one active processor / 20 processors / 100 processor / Synchronization algorithms / one processor / TATAS algorithm / spin lock algorithms / Correctness Synchronization algorithms / 20 24 28 32 36 40 44 48 50 Processors / invalidation-based cachecoherence protocol / 250 MHz processors / different processors / same processor / 8 9 10 11 12 13 14 15 16 Processors / simulation / 40 44 48 50 4 8 12 16 20 Processors / html / 32 processors / fewer active processors / shared memory / synchronization algorithm / invoking processor / 44 processors / /URLwww.cs.rochester.edu/u/scott/synchronization / /SocialTag |