Back to Results
First PageMeta Content



Integrated 3D-Stacked Server Designs for Increasing Physical Density of Key-Value Stores Anthony Gutierrez Michael Cieslak Ronald G. Dreslinski Luis Ceze†
Add to Reading List

Document Date: 2014-03-01 12:40:42


Open Document

File Size: 3,81 MB

Share Result on Facebook

City

Salt Lake City / A7 / A15 / /

Company

Netflix / Twitter / Facebook / Peripheral Logic Bank / Oracle / Google / YouTube / Port 9 0 / Scale-Out Systems / Toshiba / Broadcom / HP / MySQL / Horizontal Bank / Intel / /

Country

Belgium / United States / /

Currency

Rs / USD / AMD / /

/

Event

Product Release / /

Facility

Gb Port / Each port / Engineering Department University of Washington / Advanced Computer Architecture Laboratory University of Michigan / Ethernet port / /

IndustryTerm

disk-based systems / 3D stacking technology / Web Server Web Server Key Value Store Caching Layer Client Client Web Server / 4GB 3D chip / service web requests / web request / 3D-stacked memory technology / twotier infrastructure / cheaper solution / memory technologies / suitable processor / Web Server Web Server Client Client Database Web Server Web Server Database Web Server Client Web Server / wear-leveling algorithm / bank / Data center real estate / 28nm technology / cache server / commodity hardware / energy efficiency / client systems / recent technology / networked systems / low-request-rate applications / compact and efficient multicore processors / Network processing / photo server / server real estate / overall energy / distributed keyvalue store caching systems / web server setup / energy values / web service / systemon-chip / cloud computing workloads / redundant systems / energy-efficiency / replacement algorithm / electronic commerce workloads / server applications / cloud computing / simulation infrastructure / metadata processing / web services / /

OperatingSystem

Ubuntu / Linux / /

Organization

University of Michigan / University of Washington - Seattle / Logical / /

Person

Trevor Mudge / Anthony Gutierrez Michael Cieslak Ronald / /

/

Position

memory controller / programmable Flash memory controller / /

Product

Memcached / McDipper / Iridium / M-9 / /

ProgrammingLanguage

Java / HTML / /

ProvinceOrState

Utah / Iowa / /

Technology

memory technologies / NIC PHY chip / 4GB 3D chip / Linux / operating system / HTML / 3D-stacked memory technology / suitable processor / Xeon processors / pseudo LRU algorithm / cache server / Java / Niagra-2 chip / 2 10GbE PHYs/chip / 28nm technology / Flash / wear-leveling algorithm / multicore processors / TCP/IP / replacement algorithm / Ethernet / Flash memory / DNS / using 3D stacking technology / ARM Cortex-A7 chip / Caching / simulation / 48 Dual NIC PHY chips / caching system / Web Server / /

URL

www.ex.com / http /