Cache control instruction

#	Item
11	PDF Document Add to Reading List Source URL: h21007.www2.hp.com Language: English - Date: 2001-08-24 18:35:16 Central processing unit Instruction set Reduced instruction set computing CPU cache Control register PA-RISC PA-7100LC MIPS architecture Computer architecture Computing Instruction set architectures
12	PDF Document Add to Reading List Source URL: datasheets.chipdb.org Language: English - Date: 2008-01-14 13:59:32 Central processing unit Programming idioms Assembly languages Machine code Instruction set architectures X86 debug register Control register Addressing mode CPU cache Computer architecture Computing Computer hardware
13	PDF Document Add to Reading List Source URL: dev.lemote.com Language: English - Date: 2011-05-04 12:04:52 Computer hardware Computer memory Instruction set architectures Virtual memory Translation lookaside buffer CPU cache MIPS architecture Control register Instruction set Computer architecture Central processing unit Computing