Caché

Results: 5566



#Item
981Micro-Policies: Formally Verified Tagging Schemes for Safety and Security (Extended Abstract) C˘at˘alin Hrit¸cu (INRIA Paris)1 Today’s computer systems are distressingly insecure. A host of vulnerabilities arise fro

Micro-Policies: Formally Verified Tagging Schemes for Safety and Security (Extended Abstract) C˘at˘alin Hrit¸cu (INRIA Paris)1 Today’s computer systems are distressingly insecure. A host of vulnerabilities arise fro

Add to Reading List

Source URL: software.imdea.org

Language: English - Date: 2014-07-17 09:25:53
982Program Assisted Cache Management Realizing Cache Clairvoyance Jacob Brock, Xiaoming Gu, Chen Ding, Bin Bao

Program Assisted Cache Management Realizing Cache Clairvoyance Jacob Brock, Xiaoming Gu, Chen Ding, Bin Bao

Add to Reading List

Source URL: plg.uwaterloo.ca

Language: English - Date: 2012-11-22 15:23:03
    983Cache-Conscious Sorting of Large Sets of Strings with Dynamic Tries Ranjan Sinha∗ Justin Zobel†

    Cache-Conscious Sorting of Large Sets of Strings with Dynamic Tries Ranjan Sinha∗ Justin Zobel†

    Add to Reading List

    Source URL: goanna.cs.rmit.edu.au

    Language: English - Date: 2002-12-19 15:27:49
      984Cache Valley SDAT A Report on the Sustainable Design Assesment Team Cache Valley, Utah June 28–30, 2005

      Cache Valley SDAT A Report on the Sustainable Design Assesment Team Cache Valley, Utah June 28–30, 2005

      Add to Reading List

      Source URL: dwa-design.com

      Language: English - Date: 2014-12-30 19:19:23
        985On the Localness of Software Zhaopeng Tu Zhendong Su  Prem Devanbu

        On the Localness of Software Zhaopeng Tu Zhendong Su Prem Devanbu

        Add to Reading List

        Source URL: macbeth.cs.ucdavis.edu

        Language: English - Date: 2014-07-25 14:06:06
        986Appears in the Proceedings of the 34th International Symposium on Microarchitecture (MICRO), Reducing Set-Associative Cache Energy via Way-Prediction and Selective Direct-Mapping Michael D. Powell, Amit Agarwal, T

        Appears in the Proceedings of the 34th International Symposium on Microarchitecture (MICRO), Reducing Set-Associative Cache Energy via Way-Prediction and Selective Direct-Mapping Michael D. Powell, Amit Agarwal, T

        Add to Reading List

        Source URL: infoscience.epfl.ch

        Language: English - Date: 2011-07-09 03:41:43
          987Shared Level-1 instruction-cache performance on AMD family 15h CPUs Advanced Micro Devices, Inc. December 2011

          Shared Level-1 instruction-cache performance on AMD family 15h CPUs Advanced Micro Devices, Inc. December 2011

          Add to Reading List

          Source URL: developer.amd.com

          Language: English - Date: 2013-10-25 00:31:30
            988Opportunities for Parallelism in Matrix Multiplication FLAME Working Note #71 Tyler M. Smith∗  Robert A. van de Geijn∗

            Opportunities for Parallelism in Matrix Multiplication FLAME Working Note #71 Tyler M. Smith∗ Robert A. van de Geijn∗

            Add to Reading List

            Source URL: www.cs.utexas.edu

            Language: English - Date: 2014-01-10 19:11:37
            989Microsoft Word - zazen__main__41__group__12-09__ .doc

            Microsoft Word - zazen__main__41__group__12-09__ .doc

            Add to Reading List

            Source URL: www.deshawresearch.com

            Language: English - Date: 2010-09-27 16:06:44
            990Shared Level-1 instruction-cache performance on AMD family 15h CPUs Advanced Micro Devices, Inc. December 2011

            Shared Level-1 instruction-cache performance on AMD family 15h CPUs Advanced Micro Devices, Inc. December 2011

            Add to Reading List

            Source URL: amd-dev.wpengine.netdna-cdn.com

            Language: English - Date: 2013-10-25 00:31:30