| Document Date: 2013-11-26 12:58:30
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City Antimonide / Washington / DC / Santa Clara / NTIMONIDE / / Company LG / Applied Materials Inc. / Naval Research Laboratory / / Country United States / / / Facility Stanford University / / IndustryTerm metal / carrier concentration / heterostructure devices / self-aligned metal contacts / metal source/drain / Metal alloy / p-channel metal / electronics / speed low-power logic applications / low thermal budget processing / metal contact property / antimonide-based metal source/drain / low-power complementary metal / channel p-metal-oxide-semiconductor field effect transistors / metal pads / metal contact resistance / / OperatingSystem Fermi / / Organization Center for Integrated Systems / Stanford University / Department of Electrical Engineering / / Person Aneesh Nainani / Archana Kumar / Brian R. Bennett / Chien-Yu Chen / John Brad Boos / M. Passlack / / / Position Editor / / ProgrammingLanguage DC / / ProvinceOrState California / / SportsLeague Stanford University / / Technology semiconductor / semiconductors / X-ray / dielectric / lithography / Digital Object Identifier / metal S/D Schottky-barrier MOSFET technology / patterned using contact lithography / / URL http /
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IEEE ELECTRON DEVICE LETTERS, VOL. 34, NO. 11, NOVEMBER[removed]Antimonide-Based Heterostructure p-Channel MOSFETs With Ni-Alloy Source/Drain