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Computing / Dynamic random-access memory / DDR3 SDRAM / ECC memory / RAM parity / Error detection and correction / Random-access memory / DDR SDRAM / Memory rank / Computer memory / Computer hardware / Digital media


I’M ECC DRAM with integrated error correcting code A Revolutionary Product Family of Error-Correcting Memory for High Availability Applications
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Document Date: 2014-06-04 13:03:24


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File Size: 453,96 KB

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City

Toronto / Mountain View / /

Company

Eduardo - Google Inc. / Google / Wolf-Dietrich - Google Inc. / /

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Facility

University of Toronto / University Of Toronto* / /

IndustryTerm

memory technologies / memory solutions / process-technologies / Control-systems / automotive graded memory-product / automotive and other applications / availability applications / avionic and space based electronics / temperature products / connected storage media / security systems / software changes / electronic products / quality products / manufacturing process / /

Organization

University of Toronto / /

Person

Error-Correcting Memory / Schroeder / /

/

Position

representative / /

Technology

8 chips / radiation / memory technologies / 1 Gigabit DRAM chip / ECC algorithm / LPDDR1 technologies / integrated error correction Technology / Server processors / Gigabit / /

URL

www.intelligentmemory.com / /

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