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T021607_XC4VFX60 Synopsis V1.0 Heavy ion SEE test of Virtex4 FPGA XC4VFX60 from Xilinx Christian Poivey1, Melanie Berg1, Scott Stansberry2, Mark Friendlich1, Hak Kim1, Dave Petrick3, Ken LaBel3
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Document Date: 2010-03-13 19:08:56


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File Size: 1,29 MB

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Company

Ken LaBel3 1 2 Muniz Engineering Inc. / Xilinx / /

Facility

OPB bridge / RS232 port / University of Southern California / Virtex4 XC4VFX60 XC4VFX60 FF1152DGQ0609 FF1152DGQ0609 DD1401594A DD1394545A 11I-ES1 11I-ES1 Facility / Texas A&M Cyclotron Single Event Effects Test Facility / Internal Configuration Access Port / Test Facility TEXAS A&M Cyclotron Single Event Effects Test Facility / /

IndustryTerm

reach device / self-scrubbing algorithms / software tool / test equipment / cm2/device / memory bank / Each processor / /

Organization

Texas A&M / University of Southern California / National Aeronautics and Space Administration / /

Person

Ion Type / /

Position

local Digital Clock Manager / /

Product

CL / /

ProgrammingLanguage

Labview / /

ProvinceOrState

Southern California / /

Region

Southern California / /

Technology

self-scrubbing algorithms / FPGA / Ethernet / radiation / Each processor / Devices Tested Device technology / flash memory / On chip / 405 processors / JTAG / SDRAM / SRAM / operating system / VHDL / flash / UART / exercised using the configurable FPGA / /

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