![Application-specific integrated circuit / Synopsys / Field-programmable gate array / Timing closure / FPGA prototype / Logic synthesis / Catapult C / Electronic engineering / Electronic design automation / High-level synthesis Application-specific integrated circuit / Synopsys / Field-programmable gate array / Timing closure / FPGA prototype / Logic synthesis / Catapult C / Electronic engineering / Electronic design automation / High-level synthesis](https://www.pdfsearch.io/img/e87d8582c4c828c282f0bcc08fbc3425.jpg)
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Company STMicroelectronics Synopsys Inc. / RTL / Synopsys Inc. / FFT / DDS / including DDS / / Country United States / / IndustryTerm metal / multirate processing / technology nodes / architecture tradeoffs multimedia products / multirate management / demodulator algorithms / highlevel synthesis tool / demodulator algorithm / fixed-point multirate algorithm / / OperatingSystem ECOs / / Organization FPGA / ASIC / / Person Srevats Laxman / / Position Synplify Premier / Technical Leader IP Algorithms / Technical Leader / Premier / Gurudatta Mewundi IP Manager / / Product Synphony Model Compiler / / ProgrammingLanguage Simulink / / Technology semiconductor / FPGA / ASIC / fixed-point multirate algorithm / demodulator algorithms / demodulator algorithm / IP Algorithms / ASIC technology / demodulator IP algorithms / DSP / Leader IP Algorithms / multirate TV demodulator algorithms / / URL www.synopsys.com / http /
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