GPU Acceleration of the HEVC Decoder Inter Prediction Module Diego F. de Souza, Aleksandar Ilic, Nuno Roma and Leonel Sousa INESC-ID, IST, Universidade de Lisboa Rua Alves Redol 9, , Lisbon, Portugal Email: {dieg

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Date: 2016-03-10 05:49:53 Video compression ISO standards MPEG High-definition television Videotelephony High Efficiency Video Coding Motion compensation Coding tree unit H.264/MPEG-4 AVC Inter frame Deblocking filter Graphics processing unit		GPU Acceleration of the HEVC Decoder Inter Prediction Module Diego F. de Souza, Aleksandar Ilic, Nuno Roma and Leonel Sousa INESC-ID, IST, Universidade de Lisboa Rua Alves Redol 9, , Lisbon, Portugal Email: {dieg Add to Reading List Source URL: www.inesc-id.pt Download Document from Source Website File Size: 313,96 KB Share Document on Facebook

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