| Document Date: 2008-07-09 11:47:18
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City Anaheim / / Company SIAM Journal / Toshiba Corp. / Ge / Toshiba America Research Inc. / Publishers Inc. / / Currency USD / / / Event Product Issues / / Facility I/O terminal / P. Hall / terminal Electrical Switches / bar Control / terminal Select / California Institute of Technology / / IndustryTerm high bandwidth communications / on chip network / post-silicon device / wafer-bonding technology / non-classical devices / post-silicon switching devices / aggressive algorithm / defect-free algorithm / non-defect algorithm / nanoscale devices / post-silicon devices / post-silicon technologies / micro-chips / crossbar routing algorithm / defect tolerant algorithm / using a more aggressive algorithm / / Organization California Institute of Technology / London Mathematical Society / Shinobu Fujita André DeHon Department of Computer Science / vol. / / Person Shinobu Fujita André DeHon / Bipul C Paul / Fujita André DeHon / Morgan Kaufmann / Kumiko Nomura Keiko Abe / / / Position representative / / Product switch / crossbar circuit / Crosspoints / / PublishedMedium SIAM Journal on Computing / / Technology defect tolerant algorithm / crossbar routing algorithm / defect-free algorithm / Fundamental Routing Algorithm / Hopcraft-Karp algorithm / 2.5 Algorithm / OMR algorithm / 3D Crossbar The algorithm / conventional 2D CMOS technology / lithography / non-defect algorithm / sub-90 nm CMOS technology / silicon-CMOS and wafer-bonding technology / post-silicon technologies / routing algorithm / Offline Mesh Routing algorithm / /
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Novel Design of Three-Dimensional Crossbar for Future Network on Chip based on Post-Silicon Devices Kumiko Nomura Keiko Abe, Shinobu Fujita André DeHon