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Mathematics / Ordinal arithmetic / Curry–Howard correspondence / Algebraic geometry / Field theory / Valuation


Power-aware speed scaling in processor sharing systems: Optimality and robustness
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Document Date: 2012-10-24 10:24:06

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File Size: 577,41 KB

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Company

Elsevier B.V. / Intel / /

Country

United States / Australia / /

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Facility

Cornell University / California Institute of Technology / Swinburne University of Technology / /

IndustryTerm

processor sharing systems / energy consumption / vs energy-aware-load / wireless system / average energy / off-line algorithm / energy cost / shortest remaining processing time first / binary search / nm chips / elegant solution / batch processing / variable speed processor / fixed energy budgets / set energy/heat budget / less energy / energy use / statedependent processing speeds / recursive numerical algorithm / near-future chips / speed scaling algorithms / state-dependent processing speeds / numerical solution / energy / /

Organization

School of ECE / California Institute of Technology / Centre for Advanced Internet Architectures / Swinburne University of Technology / Computer Science Department / Cornell University / /

Person

Harrison / George / Adam Wierman / /

Position

non-clairvoyant scheduler / scheduler / practical scheduler / Corresponding author / /

Technology

off-line algorithm / speed scaling algorithms / 770 processor / variable speed processor / real 90 nm chips / recursive numerical algorithm / computing technology / operating systems / CMOS chips / /

URL

www.elsevier.com/locate/peva / /

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