The RL AD bar / University of Utah / University Manjunath Shevgoor‡ Rajeev Balasubramonian‡ Zhen Fang§† Ramesh Illikkal∞ Ravi Iyer∞ / bar RL OR / /
IndustryTerm
energy gap / memory system energy / higher bank count / higher bank-turnaround time / energy advantages / memory energy / overall system energy / lower energy / memory systems / low bank-turnaround time / bank count / bank-turnaround / system energy / greater energy savings / energy savings / energy / fault tolerance solutions / overall system energy consumption drops / x9 chip / energy consumption / energy consumption increases / bank / energy efficiency / computing / bank activations / low-energy / system energy savings / network processing / activation energy / low-energy region / parity solution / power-sensitive systems / energy characteristics / bank-turnaround time / energy bottleneck / performance routers / bank level parallelism / higher bank counts / homogeneous memory systems / bandwidth applications / memory energy reduction / system energy consumption / low-energy portions / energy cost / out-of-order processor / bank counts / maximum energy savings / /
MarketIndex
OpenMP NAS Parallel / /
NaturalFeature
DRAM channel / RLDRAM channel / /
Organization
LPDRAM DIMMs / University of Utah / US Federal Reserve / National Science Foundation / DDR3 DIMMs / RLDRAM Reduced Latency DRAM / LPDRAM Low Power DRAM / /
Person
Ramesh Illikkal∞ Ravi Iyer / Al Davis / Rajeev Balasubramonian‡ Zhen Fang / /
Position
head / channel and memory controller / single memory controller / bus and memory controller / independent controller / representative / forward / memory controller / programmer / driver / ory controller / candidate for power optimizations / additional memory controller / power model for LPDDR2 / LPDRAM memory controller / controller / /