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Electronic engineering / Altera / Synchronous dynamic random-access memory / DDR3 SDRAM / DDR4 SDRAM / Dynamic random-access memory / Field-programmable gate array / SDRAM / Computer hardware / Computing


External Memory Interfaces in Arria 10 Devices
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Document Date: 2013-12-02 03:56:37

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City

San Jose / /

Company

Altera Corporation / Arria 10 Devices Send Feedback Altera Corporation / I/O Bank / 2A / /

IndustryTerm

balanced reference clock network / semiconductor products / bank / data groups / external memory solution / changes to any products / parametric tool / /

Organization

U.S. Patent and Trademark Office / /

Person

Lane Memory / /

Position

controller / and delay-locked loop / / controller / /

ProvinceOrState

California / /

Technology

semiconductor / FPGA / SDRAM / SRAM / /

URL

www.altera.com/common/legal.html / www.altera.com / /

SocialTag