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Data management / Data / Linearizability / Lock / Transactional memory / Parallel computing / Atomicity / Serializability / Exception handling / Computing / Concurrency control / Transaction processing


A Case for System Support for Concurrency Exceptions Luis Ceze, Joseph Devietti, Brandon Lucia and Shaz Qadeer† University of Washington {luisceze, devietti, blucia0a}@cs.washington.edu Abstract
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Document Date: 2009-03-19 20:35:38


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City

HardwareAssisted Lockset / /

Company

SIAM Journal / /

/

Facility

Shaz Qadeer† University of Washington / /

IndustryTerm

transactional memory systems / condition checks in hardware / runtime systems / multiprocessor systems / hardware/software interface / remote processors / cleaner solution / lockset algorithm / nondeterministic systems / /

Organization

University of Washington / /

Person

Luis Ceze / Joseph Devietti / Determinism (reproducibility) Table / Shaz Qadeer / Dan Grossman / Brandon Lucia / /

Position

advocate / HW memory model / programmer / /

ProgrammingLanguage

Java / C++ / /

ProvinceOrState

South Carolina / /

PublishedMedium

SIAM Journal on Computing / /

Technology

one processor / sequential consistency / lockset algorithm / shared memory / Operating Systems / Java / remote processors / /

SocialTag