A Case for FAME: FPGA Architecture Model Execution Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovi´c, David Patterson The Parallel Computing Laboratory CS Division, EECS Department, University of Cal

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Date: 2010-09-20 13:56:51 Logic design Simulation software Computer architecture Integrated circuits Field-programmable gate array Electronic design Logic simulation MicroBlaze Xilinx Electronic engineering Electronics Digital electronics		A Case for FAME: FPGA Architecture Model Execution Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovi´c, David Patterson The Parallel Computing Laboratory CS Division, EECS Department, University of Cal Add to Reading List Source URL: www.eecs.berkeley.edu Download Document from Source Website File Size: 882,03 KB Share Document on Facebook

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