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The CHERI capability model: Revisiting RISC in an age of risk Jonathan Woodruff† Robert N. M. Watson† David Chisnall† Simon W. Moore† Jonathan Anderson† Brooks Davis‡ Ben Laurie§ Peter G. Neumann‡ Robert N
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Document Date: 2014-04-24 18:23:36

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Company

Altera / CHERI / Unforgeability Software / Intel / /

Currency

USD / /

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Facility

MIPS pipeline / BERI pipeline / When building / University of Cambridge / /

IndustryTerm

compression algorithm / capability systems / web browser / userspace software / ground-up software / software fat pointers / software fat-pointer approaches / software bounds checking / software-defined locations / contemporary operating systems / minimal table fill algorithm / software model / unmodified web browser can / software robustness / software bounds-checking / software boundschecking implementation / software models / software bounds-checking research / software fat-pointer scheme / software stacks / software-enforcement case / simpler hardware / performance-sensitive applications / binary software corpora / software designs / software bounds-checking techniques / software debuggability / memory management / legacy hardware / /

OperatingSystem

UNIX / FreeBSD / /

Organization

University of Cambridge / Capability Unit / /

Person

David Chisnall† Simon / Brooks Davis‡ Ben Laurie / Jonathan Anderson† Brooks Davis / Jonathan Woodruff† Robert / Simon W. Moore† Jonathan Anderson / Robert N. M. Watson† David Chisnall / Peter G. Neumann‡ Robert Norton / Robert Norton† Michael Roe / /

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Position

guard / manager / rt / supervisor / tag manager / current tag controller / programmer / /

Product

Olden / R4000 / /

ProgrammingLanguage

Java / C / Objective-C / JavaScript / /

Technology

FPGA / UNIX / hybridization / base processor / cache memory / operating system / shared memory / operating systems / Java / compression algorithm / minimal table fill algorithm / paging / virtual memory system / simulation / virtual memory / /

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