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SHA-1 / SHA-2 / MD5 / Hash function / Block cipher / NIST hash function competition / HMAC / Advanced Encryption Standard / Differential cryptanalysis / Cryptography / Error detection and correction / Cryptographic hash functions


Document Date: 2008-11-13 06:43:12

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City

Gladesville / /

Company

AES / Qualcomm / /

Country

Australia / /

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IndustryTerm

algorithm processing / submission algorithm / Low-end processors / software implementation / software platforms / cryptographic hash algorithms / co-processor / energy usage / /

Organization

ASIC / Group of Eight / /

Person

Michael Paddon / Craig Northway / Anand Palanigounder / John Jozwiak / Craig Brown / Cameron McDonald / CHI DES DSP FPGA HMAC / Lu Xiao / Cryptographic Hash / Bijan Ansari / Jessica Purser / Brian Rosenberg / Arun Balakrishnan / Phil Hawkes / Cryptographic Hash Algorithms / Yinian Mao / Alexander Gantman / David Jacobson / Miriam Wiggers de Vries / Steve Millendorf / Yafei Yang / Aram Perez / Greg Rose / /

Position

head / head of Product Security Initiative / /

Technology

Encryption / ASIC / Logical Unit / SHA-1 algorithm / 2 algorithms / typically 8-bit processors / cryptographic hash algorithms / 64-bit processors / submission algorithm / Block Cipher / CHI algorithm / simulation / four cryptographic hash algorithms / SHA-2 algorithms / Low-end processors / SHA-512 algorithms / CHI algorithms / /

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