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![]() | Document Date: 2009-03-13 16:22:03Open Document File Size: 318,79 KBShare Result on FacebookCityII / /CompanyPMC-Sierra / Alpha Processors / Broadcom / HyperTransport Technology / AMD / API Networks / Link Topology HyperTransport / /CurrencyCAD / /IndustryTermsoftware compatibility / daisy chain / switch devices / daisy chains / interconnect technologies / silicon technologies / earlier generation systems / packet protocols / performance product / performance processors / peripheral chip-to-peripheral chip / Electrical protocols / switched topology systems / x86 processor / x86 processors / consumer devices / communications equipment / higher speed processors / communications mechanisms / interconnect bus technology / bridge device / command/address/data packet protocols / /OrganizationLow-latency Board / Powerful Board / /ProductEfficeon x86 / /TechnologyAlpha / packet protocols / peripheral chip-to-peripheral chip / high-speed processors / LVDS technology / All Packet protocol / traffic All Electrical protocol / I/O technologies / interface Low protocol / flow control / Peer-to-peer / PCI-X / Efficeon x86 processor / command/address/data packet protocols / 64-bit MIPS processor / 64-bit x86 processors / higher speed processors / silicon technologies / performance processors / overlapping processor / interconnect bus technology / I/O technology / CAD / /URLwww.hypertransport.org / /SocialTag |