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High-Speed Differential I/O Interfaces and DPA in Arria II Devices - Arria II Device Handbook, Volume 1, Chapter 8
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Document Date: 2012-07-20 05:40:13

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File Size: 1,12 MB

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Company

SERDES / Dedicated SERDES / Altera Corporation / DPA Clock Networks / 5 Dedicated SERDES / IOBANK / High-Speed Differential I/O Interfaces / /

Country

United States / /

Facility

The tx_in port / /

IndustryTerm

external resistor network / Differential applications / semiconductor products / changes to any products / /

NaturalFeature

Receiver Channel / LVDS channel / /

Organization

GX center / /

Person

DIN DOUT / DIN DOUT DIN / /

Position

driver / VP OUT VOD OUT / VP / Transceiver Block Transceiver Block Transceiver Block General / General / Programmable Pre-emphasis VP / Manager software / Memory Interface General / VP With Programmable Pre-emphasis Note / software Assignment Editor / /

Product

II GX devices / Arria II / II GX Device / /

Technology

semiconductor / FPGA / /

URL

www.altera.com/common/legal.html / /

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