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Digital electronics / Logic families / Emitter-coupled logic / Low-voltage differential signaling / Resistor / Signal integrity / Electrical termination / Impedance matching / Electronic engineering / Electrical engineering / Electronics


AND8020/D Termination of ECL Logic Devices Prepared by: Paul Shockman ON Semiconductor Logic Applications Engineering http://onsemi.com
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Document Date: 2002-06-11 09:55:18


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Company

Series (Back) Termination R Rt Rt / Rt Rt / Distributed Capacitance CO / Vt1 Vt2 VTT Rt Rt / Line Z0 Rt Rt Rt / Internal Output Impedance Q D Q D Rt Rt / Line Z0 (*or twisted pair) (*or twisted pair) Rt Rt / Capacitive Coupling R VEE Vt1 Vt2 Rt Rt / CD CO / Semiconductor Components Industries LLC / VEE Rt Rt Rt / Driver Rt Rt / /

IndustryTerm

resistor divider network / external resistor divider network / transmission media / energy / /

Person

Parallel Receiver / Paul Shockman / /

Position

sufficiently high value Rt / driver / mA Driver / IOLmin OLmin Rt / Open Vt Pin Internal Termination Combo Pin LVDS Driver / differential driver / designer / Minimum Rt Values Line VOH Rt / Internal D2 D1 Driver / ECL Input Interconnect Output Driver / Rt / VOH VCC Rt / Output Driver / Termination Resistor Rt / LVDS Driver / Rt Vt1 Vt2 Rt Rt / Pair Rt VEE Driver / EXTERNAL AND INTERNAL External Internal Rt VEE Rt Rt / R2 Driver / VTT Driver / RS Rt / /

ProgrammingLanguage

D / RC / DC / C* / /

Technology

twisted pair / http / simulation / /

URL

http /

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