Back to Results
First PageMeta Content
Clock signal / Digital electronics / Electrical circuits / Synchronization / Asynchronous system / Flip-flop / Asynchronous circuit / Delay insensitive circuit / Sequential logic / Electronic engineering / Electronics / Electromagnetism


Synchronization in Asynchronously Communicating Digital Systems Priyadharshini Shanmugasundaram
Add to Reading List

Document Date: 2010-05-02 22:04:06

Open Document

File Size: 385,85 KB

Share Result on Facebook

Facility

Data A Muller pipeline / Muller pipeline / /

IndustryTerm

channel protocols / cross product / data processing / request-acknowledge based handshake protocol / bundled-data protocol / asynchronous handshake protocols / handshake protocol / normal logic validation tools / dual rail protocol / above protocol / dual-rail protocol / energy / /

Person

Subbu Meiyappan / Ken Jaramillo / William J. Dally / Jens Sparso / John W. Poulton / /

Position

designer / distributed gatedclock driver / /

Technology

Bundled-data protocols / 4-phase bundled-data protocol / dual rail protocol / above protocol / request-acknowledge based handshake protocol / Handshake Protocols / 4-phase dual-rail protocol / dual-rail protocol / bundled-data protocol / 2-Phase Dual-Rail Protocol / 2-Phase Bundled-Data Protocol / handshake protocol / asynchronous handshake protocols / following protocols / channel protocols / CAD / Conclusion C. Wrong Protocol / /

URL

http /

SocialTag