![Digital electronics / Serial communication / Clock skew / POWER1 / Parallel communication / Parallel computing / Clock signal / Jitter / Central processing unit / Electronics / Electronic engineering / Electromagnetism Digital electronics / Serial communication / Clock skew / POWER1 / Parallel communication / Parallel computing / Clock signal / Jitter / Central processing unit / Electronics / Electronic engineering / Electromagnetism](https://www.pdfsearch.io/img/6c24343a18aaa91470d497822f8ebcd5.jpg)
| Document Date: 2008-04-16 14:58:33 Open Document File Size: 1,46 MBShare Result on Facebook
City Haifa / Newcastle / / Country United Kingdom / / Currency USD / / / Facility Pipeline vs. Serial Fully Unshielded Shielded Register-pipelined vs. Serial Fully Unshielded Shielded / Israel Institute of Technology / / IndustryTerm placed devices / metal layer / nm technology / repeater relative size hREP technology advances / long range communications / on-chip inter-modular communications / vs. technology node / metal thickness / inter-chip / phase protocols / damped linear networks / Source-synchronous protocols / 65nm technology / long range on-chip data communications / off-chip communications / actual chips / asynchronous handshake protocol / technology node / Bit-serial communications / asynchronous protocols / technology dependence / / NaturalFeature SER SERDES CHANNEL / / Organization ASIC / Stanford Univ. / Israel Institute of Technology / Technion / / Person SER PAR PAR AACTIVE / SER SERDES / SER SER PLEAK / Stanford Univ / SER PAR SER AINT / Rostislav (Reuven) Dobkin Arkadiy Morgenshtein Avinoam / / Position driver / VP / representative / General / line driver / / Technology two phase protocols / Adaptive Network-on-Chip / High Speed CMOS Chip / ASIC / serial inter-chip / 3-Level Asynchronous protocol / Parallel vs. Serial On-Chip / System-on-Chip / Performance Inter-Chip / Source-synchronous protocols / 65nm technology / asynchronous handshake protocol / 0 0 180 130 90 65 45 32 Technology / fabricated chip / 65 nm technology / Error Correction In 0.25µm CMOS Technology / Integrated Circuits / pdf / CAD / / URL www.ee.technion.ac.il/~ran/papers/parallelserial / http /
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