Back to Results
First PageMeta Content
Electronic design automation / Electronic design / Integrated circuits / Finite-state machine / Logic simulation / Field-programmable gate array / Placement / Logic synthesis / Clock signal / Electronic engineering / Electronics / Digital electronics


Microsoft Word - fpga34-minkovich.docx
Add to Reading List

Document Date: 2009-01-08 00:10:52

Open Document

File Size: 345,21 KB

Share Result on Facebook

City

Monterey / /

Company

S. Kim D. D. / ABC / Case / VLSI Circuits Using Bayesian Networks / VLSI Systems / /

Continent

Asia / /

Country

United States / /

Currency

USD / /

/

Facility

Kirill Minkovich Computer Science Department University of California / /

IndustryTerm

technology mapping works / Technology mapping / speed bin their products / technology mapping algorithms / search starts / long carry chain / depth-optimal mapping algorithm / delay-oriented technology / http /

MarketIndex

MCNC / /

OperatingSystem

Linux / /

Organization

Kirill Minkovich Computer Science Department University / ASIC / National Science Foundation / University of California / Los Angeles / /

Person

T. Austin / V / Kirill Minkovich / /

Position

Optimization General / General / /

Product

a new technology mapping tool called Better Than Worst-case Mapper (BTWMap) / BTWMap / Better Than Worst-case Mapper (BTWMap) / /

ProvinceOrState

California / /

PublishedMedium

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems / /

Region

South Pacific / /

Technology

FPGA / ASIC / cut-based synthesis algorithm / chip design / Razor processor / The BTWmap algorithm / BTWMap algorithm / finite state machine / Linux / SRAM / Simulation / technology mapping algorithm / delay-oriented technology / technology mapping algorithms / integrated circuits / same chip / FPGA Technology / PDF / /

URL

http /

SocialTag