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DYNAMIC TESTING FOR RADIATION INDUCED FAILURES IN A STANDARD CMOS SUBMICRON TECHNOLOGY PIXEL FRONT-END1 D. De Venuto*, F. Corsi°, member IEEE , M. J. Ohletz^, member IEEE * Dipartimento di Elettrotecnica ed Elettronica
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Document Date: 1999-10-17 21:34:03

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City

Vancouver / Washington / London / Bari / /

Company

G. A.S. / Low-Power HF / CHIP HARDWARE / Alcatel / /

Country

Italy / Canada / /

Currency

pence / /

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Event

Product Issues / /

IndustryTerm

deep submicron technologies / test hardware / detector systems / flip-flop chain / high energy physics / high energy physics experiments / amplitudes technology / high-energy / feedback network / problem radiation hard technologies / test chips / energy experiments / /

OperatingSystem

Fermi / /

Organization

US Federal Reserve / Politecnico di Bari / /

Product

circuit / condition / /

ProvinceOrState

Vermont / Washington / /

Technology

RADIATION / deep submicron technologies / X-ray / three chips / mixed analogue CMOS-NPN-PJFET-on-insulator technology / problem radiation hard technologies / V. IRRADIATION EFFECTS ON THE PIXEL FRONT-END All chips / amplitudes technology / four test chips / CMOS SUBMICRON TECHNOLOGY / 0.5µm CMOS technology / simulation / technology of radiation hardness / test chips / /

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