| Document Date: 2014-10-06 15:29:06
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City Zurich / Waltham / / Company Bluespec Inc. / MIT-Lincoln Labs / Intel / Xilinx / Science & Artificial Intelligence Laboratory / / Country Switzerland / / / Facility Value Complex / We store / Pipeline FFT Processor / Massachusetts Institute of Technology / / IndustryTerm mobile and low-power devices / frequency-sparse applications / evaluated processing times / target device / medical imaging / software implementation / iterative algorithm / above applications / fourier-transform chip / software implementations / high energy consumption / real-time processing / real time / achievable hardware / recent multi-threaded software implementation / radar signal processing / simultaneous processing / energy / / Organization ASIC / Massachusetts Institute of Technology / / Person Dina Katabi / Max Selector (Avg) / Omid Abari / Max Selector / B. Max Selector / / ProvinceOrState Massachusetts / / RadioStation Core / / Technology FPGA / RAM / ASIC / SFFT algorithm / 0.75-million-point fourier-transform chip / frequency hopping / sparse FFT algorithm / probabilistic SFFT algorithm / SFFT algorithms / iterative algorithm / plug and play / 4096-point FFT The SFFT algorithm / Parallel Processing / medical imaging / / URL http /
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High-Throughput Implementation of a Million-Point Sparse Fourier Transform Abhinav Agarwal, Haitham Hassanieh, Omid Abari, Ezz Hamed, Dina Katabi & Arvind Computer Science & Artificial Intelligence Laboratory, Massachuse