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Graph-Based Algorithms for Boolean Function Manipulation12 Randal E. Bryant3
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Document Date: 2012-06-01 10:15:43

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File Size: 98,82 KB

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Pittsburgh / /

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Las Vegas NV / /

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Reorganization / /

Facility

Carnegie-Mellon University / California Institute of Technology / /

IndustryTerm

reduction algorithm / contact network / combinational logic gate network / combinational logic network / gate operator / canonical sum-of-products / bit-serial processor / digital logic design applications / typical applications / manipulation algorithms / graph algorithms / reduced sum-of-products / parity ladder contact network / integer product / /

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Shannon / /

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California Institute of Technology / Carnegie-Mellon University / Department of Computer Science / /

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mark fields / /

ProgrammingLanguage

Pascal / /

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Pennsylvania / /

PublishedMedium

IEEE Transactions on Computers / /

Technology

design verification / graph algorithms / 3 algorithms / Reduction The reduction algorithm / bit-serial processor / manipulation algorithms / /

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