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Preprint of Chapter 24, pp. 699–722, in Parallel and Distributed Computing Handbook, Albert Y. Zomaya, editor. McGraw-Hill, [removed]Chapter X
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Document Date: 2011-03-28 18:19:23

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Company

BBN Monarch / Cray Research / McGraw-Hill / /

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Facility

Computer Science University of Rochester Rochester / /

IndustryTerm

interconnection network / chip technology / multiprocessor memory systems / computer systems / given processor / densest available chips / flat memory systems / bank / supercomputer processors / software trends / memory bank / distributed computing / memory chips / memory systems / particular technology level / slow memory chips / /

Organization

Computer Science University of Rochester Rochester / Michael L. Scott Department / /

Person

Albert Y. Zomaya / Michael L. Scott / Leonidas I. Kontothanassis / /

Position

editor / programmer / /

Product

Mbit chips / Mbit / /

Technology

RAM / 100 processor / given processor / 16 Mbit chips / RISC processor / then 8 chips / 0.1 Memory Hardware Technology / 7 Level Name Capacity Response Time Processors / caching / same processor / chip technology / random access / SRAM / slow memory chips / DRAM chips / Shared Memory / memory chips / DRAM chip / supercomputer processors / integrated circuit / /

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