Concurrent use of write-once memory∗ James Aspnes† Keren Censor-Hillel‡ Eitan Yaakobi§

Source URL: www.cs.yale.edu

Bilinear Forms Eitan Reich February 28, 2005 We may begin our discussion of bilinear forms by looking at a special case that we are

Source URL: math.mit.edu

Eurographics Symposium on Geometry Processing 2012 Eitan Grinspun and Niloy Mitra (Guest Editors) Volume), Number 5

Source URL: igl.ethz.ch

Using Combinatorial Benchmark Construction to Improve the Assessment of Concurrency Bug Detection Tools Jeremy S. Bradburyα, Itai Segallβ, Eitan Farchiβ, Kevin Jalbertα, David Kelkα αSoftware

Source URL: faculty.uoit.ca

TOPIC #1: Concurrent Testing - Eitan Farchi, Jan Fiedor, Tomas Vojnar, Michael Pradel, Severin Heiniger, Samira Tasharofi When to stop? • A concurrent program is run repeatedly – each run new interleavings are execut

Source URL: faculty.uoit.ca

• Computing
• Software
• Concurrent computing
• Edsger W. Dijkstra
• Lock
• Code coverage
• Interleaving
• Thread

Eurographics Symposium on Geometry Processing 2012 Eitan Grinspun and Niloy Mitra (Guest Editors) Volume), Number 5

Source URL: sofienbouaziz.com

• Geometry
• Mathematics
• Archimedean solids
• Mathematical optimization
• 3D computer graphics
• Finite element method
• Planar graphs
• Shape optimization
• Polygon mesh
• Map projection
• Truncated icosahedron
• Regular icosahedron

Francesco Cerigioni ` noma de Barcelona - Barcelona GSE Universitat Auto Webpage: francescocerigioni.weebly.com Mobile Phone:+

Source URL: idea.uab.es

• Barcelona Graduate School of Economics
• Cerdanyola del Valls
• Eitan Berglas
• University of Alabama at Birmingham
• Bellaterra
• Economics
• Alabama
• Fellows of the Econometric Society

Using Program Closures to Make an API Thread Safe Eitan Farchi, Itai Segall, Joao M. Lourenco, Digo Sousa, PADTAD, JulyIBM Confidential

Source URL: faculty.uoit.ca

• Concurrency control
• Parallel computing
• Software design patterns
• Futures and promises
• Inter-process communication
• Lock
• Thread

Row-by-Row Coding for Mitigation of Bitline Inter-cell Interference in MLC Flash Memories Sarit Buzaglo, Eitan Yaakobi, and Paul H. Siegel Center for Magnetic Recording Research, UCSD Technion - Israel Institute of Techn

Source URL: tce.webee.eedev.technion.ac.il

Consecutive Switch Codes Sarit Buzaglo∗ , Eitan Yaakobi† , Yuval Cassuto‡ , and Paul H. Siegel∗§ ∗ Center for Memory and Recording Research, University of California, San Diego, La Jolla, CAUSA †

Source URL: ycassuto.eew.technion.ac.il