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Electrical engineering / Electronic design / Semiconductor devices / Logic families / CMOS / MOSFET / Transistor / Field-effect transistor / Standard cell / Electronic engineering / Electronics / Integrated circuits


Vertical Slit Transistor Based Integrated Circuits (VeSTICs): Overview and Highlights of Feasibility Study Wojciech Maly Electrical and Computer Engineering Department, Carnegie Mellon University Pittsburgh, PA 15213, US
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Document Date: 2014-04-23 00:04:33

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File Size: 751,91 KB

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Helsinki / Vertical Slit / /

Company

IACSIT Press / /

Country

Singapore / United States / /

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Facility

Pub Date / Pub No. US / Carnegie Mellon University / Pub No US / /

IndustryTerm

power delay product / technology nodes / accumulation type device / test devices / low power applications / energy / /

Organization

General Services Administration / Carnegie Mellon University Pittsburgh / Feasibility Study Wojciech Maly Electrical and Computer Engineering Department / /

Person

Wei Lin / Wojciech Maly / /

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Product

Ion / /

Technology

CMOS-based chip / VeSFET chip / lithography / IC technologies / Field-Effect Transistor / SRAM / simulation / 3-D chips / 3D Chips / Integrated Circuits / INTEGRATED CIRCUIT / CAD / /

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http /

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