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Logic in computer science / Digital electronics / Logic synthesis / Logic simulation / High-level synthesis / Verilog / Actor model / Abstraction / Programming language / Electronic engineering / Electronic design automation / Electronic design


Digital Design Derivation 1. Introduction This research applies formal methods in logic, verification, and synthesis to digital design engineering. The work centers on the use of applicative notation for system descript
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Document Date: 2001-09-19 15:58:20

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File Size: 112,37 KB

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City

Cambridge / Calgary / /

Facility

University of Cambridge Computer Laboratory Technical Report No. / /

IndustryTerm

secure software connection / by-product / hospitable target technologies / programmable technology / software design-aids / target media / synchronous digital systems / incompatible tools / hardware design tools / analytic tools / software engineering research / sequential systems / hardware-generation systems / present technology / software systems / software-oriented research / clocked hardware / /

Organization

National Science Foundation / University of Cambridge Computer Laboratory Technical Report / /

Person

Mitchell Wand / David Winkel / Raymond T. Boute / Mike Gordon / Franklin Prosser / Eugene Kohlbecker / Daniel P. Friedman / Chris T. Haynes / /

Position

editor / garbage collector / micro-coded interpreter / prototype editor / practicing engineer / engineer / /

ProgrammingLanguage

FP / /

Technology

functional programming / simulation / PAL technology / hospitable target technologies / /

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