MTDC-32 V2.6_1 32 2 channel VME time digitizer (TDC) - Emitter-coupled logic - Document - PDFSEARCH.IO

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	MTDC-32 V2.6_1 32 + 2 channel VME time digitizer (TDC) Add to Reading List Document Date: 2014-05-22 10:48:57 Open Document File Size: 484,18 KB Share Result on Facebook City Putzbrunn / / Company ADCs Bank / MHz mesytec GmbH & Co. KG / mesytec GmbH & Co. KG / mA mesytec GmbH & Co. KG / / Country Germany / / / / IndustryTerm bank inputs / bank / bit time difference event builder / bank operation / / Organization US Federal Reserve / / / Technology FPGA / ADC / / URL www.mesytec.com / / SocialTag Emitter-coupled logic Channel Telecommunications engineering Electronic circuits Measuring instruments Electronic engineering Electronics Low-voltage differential signaling

MTDC-32 V2.6_1 32 + 2 channel VME time digitizer (TDC)Add to Reading List