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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 21, NO. 10, OCTOBERwhere n is the stage gain, f is the clock frequency, VDD is the supply voltage, CCLK is the clock capacitance, N is the num
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Document Date: 2013-09-24 07:27:55
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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 21, NO. 10, OCTOBERwhere n is the stage gain, f is the clock frequency, VDD is the supply voltage, CCLK is the clock capacitance, N is the num