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Company IBM / Sun Microsystems / ACM Press / IEEE CS Press / Transmeta / Intel / / Currency USD / / Facility store Memory / TRIPS Team The University of Texas / University of Texas / / IndustryTerm semiconductor technology / lightweight routing network / superscalar hardware / x86 superscalar processor / point-to-point routing network / Software challenges / desktop computing / explicit memory management / unscalable broadcast bypass network / technology characteristics / cache bank / lightweight network / signal processing code / programmable spatial computing substrate / cache network / semiconductor technology evolution / register file bank / signal processing / bypass networks / graphic processing / energy-efficient delivery / lightweight processors / conventional processor / good balance between hardware / software perspective / kiloinstruction processor / bank configuration / software complexity / parallel hardware / fabrication technology / bank / superscalar processor / cache-line interleaved banks / code morphing software / diverse applications / out-of-order issue processor / energy reconstructing / scheduler software / network processing / prototype processor / prototype chip / large instruction memory ordering hardware / thread-parallel applications / superscalar processors / / Organization University of Texas at Austin / MIT / ASIC / US Federal Reserve / IEEE Computer Society / / Person Doug Burger Stephen / Stephen W. Keckler Kathryn / K. John Calvin Lin Charles / Kathryn S. McKinley Mike Dahlin Lizy / Robert G. McDonald William Yoder / Charles R. Moore James Burrill Robert / / Position intercept TAP controller / static binary translator / back-end optimization Scheduler / producer / Synopsis memory controller / candidate for solving ISA backward compatibility / Major / scheduler / / Product Smart Memories8 / x86 / / ProgrammingLanguage Java / FP / C / Fortran / C++ / / ProvinceOrState Texas / / Technology semiconductor / Alpha / functional programming / TRIPS processor / The prototype chip / underlying fabrication technology / CMOS technologies / 1 / 144 125 MHz DDR DDR Chip-to-chip / x86 superscalar processor / semiconductor technology / JTAG / operating systems / RISC processors / TRIPS-like processor / inter-ALU routers / CMP / DDR SDRAM / cryptography / ASIC / prototype chip / prototype processor / Java / conventional processor / RISC processor / Systolic processors / Multiscalar Processors / RAW processor / DLP / underlying technology / TRIPS prototype chip / kiloinstruction processor / RAW processors / superscalar processor / driving technology / 16-wide out-of-order issue processor / Parallel Processing / 16 lightweight processors / A0 A1 FP integer Router / / SocialTag 
COVER FEATURE Scaling to the End of