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Concurrent computing / Shader / Framebuffer / Rasterisation / Synchronous dynamic random-access memory / Microcode / FIFO / Computer graphics / Computing / Computer architecture


PIXELFLOW ™ RASTERIZER FUNCTIONAL DESCRIPTION John Eyles Steven Molnar Department of Computer Science
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Document Date: 1998-04-29 09:54:46

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File Size: 394,85 KB

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City

Reading / /

Company

ABC / EMC / /

Event

M&A / /

Facility

University of North Carolina / Chapel Hill Rev. / Computer Science University of North Carolina / /

IndustryTerm

image-composition network / datapath chips / pixel processors / /

Organization

SDRAMs Memory System Command / RASTERIZER FUNCTIONAL DESCRIPTION John Eyles Steven Molnar Department / University of North Carolina / MCnt and MSel Registers Command / V / /

Person

John Eyles / John Eyles Steven Molnar / Sequencer / /

Position

Local Data I/O Control Pixel Compositor / compositor / RT Controller / distributed Linear Expression Evaluator / evaluator / Video Controller / Linear Expression Evaluator / Pixels Linear Expression Evaluator / IC Controller / which controls Image Composition port operation / boards RT Controller / RT / EIGC IC Controller / Inline C++ Functions Error Checking Need checking Alignment checking Argument checking TFIFO Commands RT Controller / CONTROLLER / EMCs RT Controller / IC Controller / programmer / /

Product

Control IGC Video interface / Control IGC Video / /

ProgrammingLanguage

C++ / /

ProvinceOrState

Prince Edward Island / North Carolina / /

Technology

8-bit processor / VI.4 Rasterization Control Algorithm / two Image Generation Controller chips / CMOS datapath chips / GNI chip / SDRAM / pixel processors / 4 Shading Control Algorithm / /

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