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Algebraic logic / Canonical form / Logic


Large-Scale SOP Minimization Using Decomposition and Functional Properties Alan Mishchenko Tsutomu Sasao
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Document Date: 2003-03-28 23:58:44

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File Size: 240,29 KB

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City

Fukuoka / Anaheim / /

Company

Microelectronic Systems / Intel Corporation / /

Country

Japan / United States / /

Currency

USD / /

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Facility

Computer Sciences University of California / Kyushu Institute of Technology / CSE Kyushu Institute of Technology Iizuka / EXTRA library / Harvard University / /

IndustryTerm

canonical networks / distributive law / heuristic algorithm / divide-and-conquer algorithm / minimization algorithm / heuristic algorithms / classical minimization algorithms / time-consuming general-purpose minimization algorithms / selective network / sum-of-products / partial solutions / symbolic logic minimization algorithm / logic synthesis tools / /

MarketIndex

MCNC / /

Organization

Takeda Foundation / Japan Society for the Promotion of Science / Harvard University / Kyushu Institute of Technology / Center for Microelectronic Systems / University of California / Berkeley / Electrical Engineering and Computer Sciences University / Computation Lab / Madre / Univ. of California / Large-Scale SOP Minimization Using Decomposition and Functional Properties Alan Mishchenko Tsutomu Sasao Department of Electrical Engineering / Department of CSE Kyushu Institute of Technology Iizuka / /

Person

Jon Butler / Alan Mishchenko Tsutomu Sasao / /

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Position

first author / Butler for helpful discussions / /

ProvinceOrState

Oregon / California / /

Technology

heuristic algorithm / symbolic logic minimization algorithm / RAM / minimization algorithms / DSD / heuristic algorithms / Logic Minimization Algorithms / minimization algorithm / classical minimization algorithms / heuristic SOP minimization algorithm / BDD-based algorithm / Graph-based algorithms / Terms Algorithms / divide-and-conquer algorithm / CAD / /

URL

http /

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